Akademik Veri Yönetim Sistemi
12th INTERNATIONAL PALANDÖKEN SCIENTIFIC STUDIES CONGRESS, ISSN:9786253783341, Erzurum, Türkiye, 4 - 05 Ekim 2025, cilt.1, ss.181-188, (Tam Metin Bildiri)
In this study, a classification application was implemented by building Spiking Neural Network (SNN) architecture on the Field Programmable Gate Array (FPGA) hardware platform. The highly efficient SNN architecture, created by imitating the communication between neurons in the biological nervous system, has advantages over traditional artificial intelligence architectures in terms of speed and low power consumption. Designing advantageous SNN networks with FPGAs that have a parallel operating reputation further increases efficiency. In study, learning was conducted with 60.000 MNIST datasets and hardware was designed to classify handwritten digits. The model was trained using Spike Timing-Dependent Plasticity (STDP), which mimics synaptic plasticity, and features of the MNIST image were recognized from the incoming spike trains. Features such as line and corner detection as well as density and symmetry, were found in the image using Attention Mechanism and Hierarchical Feature Aggregation methods. This enhances the learning ability of the architecture. Additionally, the hardware-friendly Integrate and Fire (IF) neuron model was used in the architecture. Training of the designed model was completed in 16.8 ms using all samples of MNIST dataset. Furthermore, test revealed a 92% accuracy rate for the classification implementation built with FPGA and SNN architecture. Consequently, the low training time and high accuracy demonstrate that hardware architecture is an effective solution method for such studies.